Field
The disclosed technology generally relates to methods of optically coupling a photonic integrated circuit and an external optical component, and more particularly relates to methods of forming an optical interface between an integrated waveguide on a photonic integrated circuit and an external optical component. The disclosed technology further relates to systems and devices comprising such optical interfaces.
Description of the Related Technology
Generally, photonic integrated circuits (PICs) refer to circuits comprising electrical and optical components integrated on a single platform (e.g., a package or a die), which can enable on-chip and/or chip-to-chip data transfer at much higher bandwidths compared to traditional all-electrical integrated circuits. In addition, PICs can advantageously be fabricated at relatively low cost by using wafer-scale process technologies similar to technologies used to process all-electrical integrated circuits. Furthermore, the PICs can offer an added advantage of a very high level of functional integration, enabled in part by relatively small cross sections of the integrated silicon optical waveguides, which typically have less than about 1 micrometer mode-field diameter (MFD).
However, packaging of such PICs continues to pose several technological challenges, and some packaging processes can be expensive. The high packaging cost can be related to the high alignment accuracy that is often employed to couple light efficiently from compact optical waveguides on the integrated circuit to, e.g., single mode optical fibers having much larger dimensions (e.g. about 10 micrometer MFD) than the integrated optical waveguides.
Various approaches for coupling light between integrated optical waveguides and single mode optical fibers have been suggested. In one of the approaches, out-of-plane coupling has been demonstrated using diffraction gratings etched in the top surface of SOI waveguides. While these grating couplers can enable optical access anywhere on the chip surface, they can suffer from inherent bandwidth limitations. The best devices have insertion losses of 1 dB to 2 dB, and 1 dB bandwidths can for example be between 40 nm and 50 nm. In another one of the approaches, inverse tapers are used in combination with polymer, SiO2, or SiON waveguides. In some of the approaches, coupling losses of less than 1 dB can be maintained over wavelength ranges of more than 100 nm. However, both approaches disadvantageously rely on highly precise positioning of external fibers with respect to on-chip coupling structures, which involves an active alignment procedure whereby the coupling efficiency is dynamically monitored and optimized.